ECE 369A
Fundamentals of Computer Organization
Course Level
Units
Instructor(s)
Prerequisite(s)
Course Texts
Computer Organization and Design: The Hardware/Software Interface by D. A. Patterson and J.L. Hennessy. Accessing the book: zyBooks - Online version of the "Computer Organization and Design."
Schedule
Course Description
Required/elective: Required CE; Elective EE
Specific Course Information:
2021-2022 Catalog Data: Computer architecture is the science and art of selecting and interconnecting hardware components to create a computer that meets functional, performance and cost goals. This course qualitatively and quantitatively examines computer design trade-offs, teaches the fundamentals of computer architecture and organization, including CPU, memory, registers, arithmetic unit, control unit, and input/output components. Topics include a reduced instruction set computer architectures (RISC), using the MIPS central processor as an example, the interface between assembly and high-level programming constructs and hardware, instruction and memory cache systems, performance evaluation, benchmarks, and use of the SPIM/WinDLX/Verilog Simulators for the MIPS architecture. ECE 369A serves students in two ways. For those who will continue in computer architecture, it lays the foundation of state-of-the-art techniques implemented in current and future high-performance computing platforms. For those students not continuing in computer architecture, it gives an overview of the kind of techniques used in today's microprocessors.
Learning Outcomes
Specific Goals for the Course:
Outcomes of Instruction: By the end of this course the student will be able to:
- Understand the fundamentals of the computer architecture world.
- Explore computer architecture paradigms on their own.
- Articulate the design issues involved in the computer architecture both at theoretical and application levels.
- Design and implement single-cycle and pipelined datapaths for a given instruction set architecture.
- Evaluate the close relationship between the instruction set architecture design, processor design, and algorithm design.
- Understand the performance trade-offs involved in designing the memory subsystem including cache, main memory and virtual memory.
- Discuss the state of the art multicore architectures such as the NVIDIA Graphics Processing Unit.
- Evaluate the performance of a hypothetical architecture analytically.
Course Topics
A brief list of topics to be covered:
- Computer Abstractions and Technology [4 lectures]
- Instruction Sets and Software Systems [9 lectures]
- MIPS CPU and Control Unit Organization [8 lectures]
- Pipelining in MIPS CPU [9 lectures]
- Multicores, Multiprocessors, and Clusters [5 lectures]
- Exploiting Memory Hierarchy [6 lectures]
Relationship to Student Outcomes
ECE 369A contributes directly to the following specific electrical and computer engineering student outcomes of the ECE department:
1. An ability to identify, formulate, and solve complex engineering problems by applying principles of engineering, science, and mathematics.
2. An ability to apply engineering design to produce solutions that meet specified needs with consideration of public health, safety, and welfare, as well as global, cultural, social, environmental, and economic factors.
5. An ability to function effectively on a team whose members together provide leadership, create a collaborative and inclusive environment, establish goals, plan tasks, and meet objectives.