Digital VLSI Systems Design
Rabaey, Jan, et al. Digital Integrated Circuits: A Design Perspective. 2nd ed. Pearson, 2003.
Specific Course Information:
2021-2022 Catalog Data: This course covers the fundamental techniques for the design, analysis and layout of digital CMOS circuits and systems. Major topics include: MOSFET basics (structure and behavior of a MOSFET, CMOS fabrication, and design rules), detailed analysis of the CMOS inverter (static behavior, ratioed vs. ratioless design, noise margins, computing rise and fall times, delay models, resistance and capacitance estimation, design and layout of static CMOS logic gates, dynamic CMOS logic design, sequential circuit design (static and dynamic sequential circuit elements, clocking schemes and clock optimization), CMOS data path design.
Specific Goals for the Course:
Outcomes of Instruction: By the end of this course the student will be able to:
- Use circuit simulator (i.e. SPICE) and layout editor (i.e. Cadence tool) to design inverters, adders, and latches.
- Apply static and dynamic design styles to implement combinational and sequential circuits.
- Understand Moore’s law, yield, process variations, design robustness, leakage and time to market.
- Understand the tradeoffs among system performance, area consumption, and cost.
- Compare and evaluate different designs and understand the technology scaling issues.
- Formulate problems or model systems in device physics, signal processing, and related disciplines such as X2information, biology and biomedical engineering.
- Evaluate timing, reliability and flexibility of circuits and systems with different models.
Brief list of topics to be covered:
- Basic designs of Static and Dynamic CMOS inverters.
- Ratioed Logic and Pass Transistor Logic.
- Performance of Dynamic Logic and Noise Considerations in Dynamic Design.
- Static Sequential Circuits: Flip-Flop Classification, Master-Slave and Edge-Triggered FF's.
- Dynamic Sequential Circuits: the Pseudo-Static Latch, and the Dynamic 2-phase Flip- Flop.
- Datapaths in Digital Processor Architectures: the Full Adder: Circuit Design Considerations, and the Array Multiplier.
- Interconnect issues with capacitive parasitics and reliability: crosstalk.
- Timing issues in sequential circuit designs.
- Memory Classification, the memory core, memory architectures and building blocks.
Relationship to Student Outcomes
ECE 407 contributes directly to the following specific electrical and computer engineering student outcomes of the ECE department:
1. An ability to identify, formulate, and solve complex engineering problems by applying principles of engineering, science, and mathematics.
2. An ability to apply engineering design to produce solutions that meet specified needs with consideration of public health, safety, and welfare, as well as global, cultural, social, environmental, and economic factors.
6. An ability to develop and conduct appropriate experimentation, analyze and interpret data, and use engineering judgment to draw conclusions.
7. An ability to acquire and apply new knowledge as needed, using appropriate learning strategies.