ECE 274A

Digital Logic

Fall

Spring

Required Course:

Yes

Course Level

Undergraduate

Units

Instructor(s)

Ratchaneekorn Thamvichai, Professor of Practice

Prerequisite(s)

ECE 175. Prerequisite or concurrent enrollment in MATH 129.

Course Texts

zyBooks Digital Logic Design interactive textbook (zybooks.com)

Schedule

Three 50-minute lecture sessions per week, MWF 12:00 PM – 12:50 PM (lecture). One 170-minute laboratory session per week.

Course Description

Specific Course Information:
2021-2022 Catalog Data: Number systems and coding, logic design, sequential systems, register transfer language.

Learning Outcomes

Specific Goals for the Course:
Outcomes of Instruction: By the end of this course the student will be able to:

Represent any given integer number in different bases (such as base 2, 8, 10, and 16).
Explain the different binary representations of signed integers (sign magnitude, 1’s complement, 2’s complement) and use the 2’s complement format to represent any given integer numbers.
Analyze combinational logic circuits using appropriate tools such as Boolean Algebra properties, Karnaugh map.
Design combinational logic circuits using combination logic design process.
Analyze sequential logic circuits using appropriate tools.
Design sequential logic circuits using sequential logic design process.
Describe the structure and operation of Datapath components such as adder, comparator, ALU, multi-function register.
Use the principles of register-transfer level (RTL) design and high-level state machines to analyze and design digital systems.
Design digital circuits using Hardware Description Language (Verilog).
Use industry standard software design suite and programmable devices such as FPGAs to implement digital circuits.

Course Topics

Brief list of topics to be covered:

Number systems and signed numbers
Hardware Description Language (Verilog)
Combinational Logic: Boolean algebra, combinational logic design process, basic combinational components
Sequential Logic: basic storage elements, sequential logic design process
Datapath Components: adders, subtractors, multipliers, comparators, multiplexors, ALUs, multifunction registers, shifters, counters, timers, register files
Register-transfer level (RTL) design
Tradeoff or Optimization of digital circuits
Physical Implementation, FPGA Overview

Relationship to Student Outcomes

ECE 274A contributes directly to the following specific electrical and computer engineering student outcomes of the ECE department:

1. An ability to identify, formulate, and solve complex engineering problems by applying principles of engineering, science, and mathematics.
2. An ability to apply engineering design to produce solutions that meet specified needs with consideration of public health, safety, and welfare, as well as global, cultural, social, environmental, and economic factors.
5. An ability to function effectively on a team whose members together provide leadership, create a collaborative and inclusive environment, establish goals, plan tasks, and meet objectives.

Syllabus Prepared By

Syllabus updated on 3/29/2022