ECE 506

In this class, we investigate the state-of-the-art in reconfigurable computing both from a hardware and software perspective; understand both how to architect reconfigurable systems and how to apply them to solving challenging computational problems. The purpose of this course is to prepare students for engaging in research on reconfigurable computing. Initially, we review in detail the basic building blocks of most reconfigurable computers. Characteristics of FPGA architecture such as the organization of device logic and interconnection resources are examined to quantify hardware limitations. These physical limitations are then contrasted with computer-aided design issues such as the selection of circuit component locations in devices (the placement problem) and subsequent circuit interconnection between components (the routing problem). We then focus on the architecture for existing multi-FPGA systems and on compilation techniques for mapping applications described in a hardware description language to reconfigurable hardware. We will explore the question of “What makes an application suitable for reconfigurable computing?” with case studies in bioinformatics, image processing, video Processing, cryptography, molecular dynamics and computational fluid dynamics. We evaluate the FPGA based application acceleration with the emerging multicore architectures from the perspectives of price/performance and performance/watt. Specific contemporary reconfigurable computing systems are examined to identify existing system limitations and to highlight opportunities for research in dynamic and partial configuration areas.

Assessment

• Homework: 3-5 assignments
• Project: 1 project
• Exams: 1 midterm exam
• Typical grading policy: 20% midterm, 50% project, 20% homework, 10% participation