Bane Vasic

• Professor of Electrical and Computer Engineering
• Professor of Mathematics
• Professor, BIO5 Institute

Bane Vasic is a professor of electrical and computer engineering and mathematics at the University of Arizona and a director of the Error Correction Laboratory. He is one of the inventors of the soft error-event decoding algorithm, and the key architect of a detector/decoder for Bell Labs' read-channel chips regarded as the best in industry.

Low-complexity iterative decoder implementations are possible due to Vasic's pioneering work on structured low-density parity check, or LDPC, error correcting codes, and further invention of codes. Structured LDPC codes are today used in a number of communications standards and are now considered in nonvolatile memories and optical communications systems.

He was involved in the Digital Versatile Disc, or DVD, Standardization Group and IEEE Working Group on Error Correction Coding for Non-Volatile Memories. He is known for his theoretical work in error correction coding theory and codes on graphs that have led to codes and decoders for binary symmetric channel with the best error-floor performance known today.

Vasic is a co-founder of Codelucida, a startup company developing advanced error correction solutions for communications and data storage. He is an IEEE Fellow, a UA College of Engineering da Vinci Fellow, and chair of the IEEE Data Storage Technical Committee.